Phase-locked loop circuit

ABSTRACT

A phase-locked loop circuit has an output amplifier ( 27 ) and a main feedback path from the output of the output amplifier ( 27 ). A subsidiary feedback path is provided directly from the output of the circuit&#39;s VCO ( 32 ). At the start of operation, the output amplifier ( 27 ) is disabled and the subsidiary feedback path is used until lock is achieved. Then the output amplifier ( 27 ) is enabled and the main feedback loop is used. This avoids spurious outputs from the outer amplifier while to loop locks.

This application is the National Stage of International Application No.PCT/EP02/05722, International Filing Date, May 24, 2002, whichdesignated the United States of America, and which internationalapplication was published under PCT Article 21(2) as WO Publication No.WO 03/100978 A1.

FIELD OF THE INVENTION

The present invention relates to a phase locked loop circuit.

BACKGROUND TO THE INVENTION

The present trend in portable communications devices such as mobiletelephones is to increasingly lightweight devices with increasedtalk-time between battery recharge cycles. Such developments requireever more efficient radio-frequency (RF) amplifiers to minimise powerconsumption. In cellular systems such as GSM, the modulation scheme is aconstant amplitude scheme, also referred to as constant envelopemodulation, which permits use of efficient non-linear amplifiers.However, recent types of communication system such as EDGE and UMTS usenon-constant envelope modulation schemes. The drawback is that theamplification of non-constant envelope RF signals requires the use oflinear power amplifiers, which are inherently less efficient. The lowerpower efficiency of linear amplifiers translates into higher powerconsumption and higher heat dissipation.

A variety of linearisation architectures and schemes exist, includingfixed and adaptive pre-distortion, adaptive bias, envelope eliminationand restoration, polar loop and Cartesian loop transmitters. Details ofsuch devices are shown in “Increasing Talk-Time with Efficient LinearPA's”, IEE Seminar on TETRA Market and Technology Developments, Mann S,Beach M, Warr P and McGeehan J, Institution of Electrical Engineers,2000, which is incorporated herein by reference. However, many of thesedevices and techniques are unsuitable for battery operated portabledevices such as mobile telephones, or are incapable of meeting currentRF design standards, such as the TETRA linearity standard, ETSIpublication ETS 300 396-2; “Trans-European Trunked Radio (TETRA);—Voiceplus Data (V+D)—Part 2: Air Interface (AI)”; March 1996.

Envelope elimination and restoration (EER) transmitters separateenvelope and phase information from an input modulated signal. The phaseinformation is then passed through a power amplifier as a constantenvelope signal, permitting the use of efficient, non-linear amplifiers,while the envelope signal is added to the power amplifier output. Inorder to correct AM-PM distortion, phase feedback is employed and thepower amplifier is effectively placed within phase-locked loop.

A problem arises in the spurious emissions are generated by the poweramplifier in the period before the loop is locked at the beginning of atransmission.

SUMMARY OF THE INVENTION

According to the present invention, there is provided a phase-lockedloop circuit comprising an oscillator controlled in dependence on theoutput of a phase detector, an output amplifier for amplifying theoutput of the oscillator and a feedback path to the phase detector fromthe output of the output amplifier, characterised by a second feedbackpath from the output of the oscillator to the phase detector, by-passingthe output amplifier, and control means for disabling the outputamplifier when the loop circuit is not locked and interrupting thesecond feedback path when the loop circuit has become locked.

Thus, unwanted components in the output of the output amplifier can beavoided by ensuring that the amplifier does not become active until theloop has achieved lock.

Preferably, the second feedback path includes a variable gain amplifier,the control means being configured to interrupt the second feedback pathby reducing the gain of the variable gain amplifier. More preferably,the control means is configured to interrupt the second feedback path byramping down the gain of the variable gain amplifier. Still morepreferably, the control means is configured to ramp up the gain ofoutput amplifier on enabling thereof, the ramping down of the gain ofthe variable gain amplifier overlapping the ramping up of the gain ofoutput amplifier. Phase control means may be included for matching thephase of the output of the variable gain amplifier to that of the outputof the output amplifier when both are operating. Such phase controlmeans may comprise a variable delay in the second feedback path, a phasedetector receiving a signal from the second feedback path downstream ofthe variable delay and a signal from the first feedback path and alow-pass filter for filtering the output of the phase detector toprovide a delay control input signal for the variable delay.

Preferably, the first and second feedback paths share a common portion.More preferably, the first and second feedback paths are united by asummer and/or the common portion includes a frequency down converter.

A circuit according to the present invention may be advantageouslyemployed in an envelope elimination and restoration transmitter suchthat the first feedback path provides a feedback signal for a closedloop envelope restoration circuit and the control means includes anenvelope controller for controlling the gain of the output amplifier.

A circuit according to the present invention may be advantageouslyemployed in a mobile phone such that the output amplifier is an RF poweramplifier.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view of a mobile telephone handset;

FIG. 2 is a schematic diagram of mobile telephone circuitry for use inthe telephone handset of FIG. 1;

FIG. 3 is a block diagram of a first embodiment of the presentinvention;

FIG. 4 illustrate the initiation of a transmission by the embodimentshown in FIG. 3; and

FIG. 5 is a block diagram of a second embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Embodiments of the invention will now be described by way of examplewith reference to the accompanying drawings.

Referring to FIG. 1, a mobile station in the form of a mobile telephonehandset 1 includes a microphone 2, keypad 3, with soft keys 4 which canbe programmed to perform different functions, an LCD display 5, aspeaker 6 and an antenna 7 which is contained within the housing.

The mobile station 1 is operable to communicate through cellular radiolinks with individual public land mobile networks (PLMNs) operatingaccording to communication schemes such as UMTS and EDGE.

FIG. 2 illustrates the major circuit components of the telephone handset1. Signal processing is carried out under the control of a digitalmicro-controller 9 which has an associated flash memory 10. Electricalanalogue audio signals are produced by microphone 2 and amplified bypre-amplifier 11. Similarly, analogue audio signals are fed to thespeaker 6 through an amplifier 12. The micro-controller 9 receivesinstruction signals from the keypad and soft keys 3, 4 and controlsoperation of the LCD display 5.

Information concerning the identity of the user is held on a smart card13 in the form of a GSM SIM card which contains the usual GSMinternational mobile subscriber identity (IMSI) and an encryption keyK_(i) that is used for encoding the radio transmission in a manner wellknown per se. The SIM card is removably received in a SIM card reader14.

The mobile telephone circuitry includes a codec 15 and an rf stage 16including a power amplifier stage 17 feeding the antenna 7. The codec 15receives analogue signals from the microphone amplifier 11, digitisesthem into an appropriate signal format and feeds them to the poweramplifier stage 17 in the rf stage 16 for transmission through theantenna 7 to the PLMN shown in FIG. 1. Similarly, signals received fromthe PLMN are fed through the antenna 7 to be demodulated in the rf stage16 and fed to codec 15, so as to produce analogue signals fed to theamplifier 12 and speaker 6.

Referring to FIG. 3, the power amplifier stage 17 comprises an envelopeelimination and restoration (EER) transmitter 18 which separates theenvelope and phase components of an input modulated IF signal into twoseparate forward paths 19, 20. A common feedback path 21 is used forcontrol of both the envelope and phase components of the RF output bythe amplifier stage 17.

The envelope forward path 19 comprises first and second envelopedetectors 22, 23 which detect the envelopes of the input modulated IFsignal and the feedback signal from the feedback path 21 respectively.The outputs of the envelope detectors 22, 23 are fed to respectiveinputs of a comparator 24. The output of the comparator 24 is filteredby a low-pass filter 25 and applied to an envelope controller 26.

The envelope controller 26 comprises a fast power supply modulator whichdirectly modulates the supply voltage of the power amplifier 27 itself.

The phase forward path 20 comprises first and second limiters 28, 29which limit the input modulated IF signal and the feedback signalrespectively to produce respective constant-amplitude signals. Theconstant amplitude signals are applied to a phase detector 30 and theoutput of the phase detector 30 is filtered by a low-pass filter 31 andapplied to a voltage-controlled oscillator 32 as is conventional in aphase-lock loop. The RF signal produced by the voltage-controlledoscillator 32 is input into the power amplifier 27 which amplifies it independence on the signal input to the envelope controller 26.

The output of the voltage-controlled oscillator 32 is also fed to avariable gain amplifier 33 which forms a branch of the common feedbackpath 21. A summer 34 receives the output of the variable gain amplifier33 and the power amplifier 27 on respective inputs. The output of thesummer 34 is connected to one input of a mixer 35. The other input ofthe mixer 35 receives a local oscillator signal. The output of the mixeris low-pass filtered by a feedback path filter 36 to select a lowfrequency mixing product. Thus, the mixer 35 and filter 36 act to downconvert the RF output of the amplifier 27 to the IF signal frequency.

The output of the feedback path filter 36 is fed to the inputs of thesecond envelope detector 23 and the second limited 29 to complete thefeedback paths of the envelope and phase control loops.

A lock detector 40 is provided to detect when the phase locked loop islocked. The lock detector 40 provides a control signal to the envelopecontroller 26 which disables the power amplifier 27 when the loop is notlocked and enables the power amplifier 27 when the loop is locked.

The output of the lock detector 40 is also input into an amplifiercontrol circuit 41 which produces a gain control signal for the variablegain amplifier 33. When the loop is not locked, the amplifier controlcircuit 41 outputs a circuit that keeps the variable gain amplifier'sgain at a maximum. However, when lock is achieved and the output of thelock detector 40 changes state, the amplifier control circuit 41 outputsa signal that causes the gain of the variable gain amplifier 33 to decayto zero.

Referring to FIG. 4, when a transmission is not being made, the poweramplifier 27 is disabled and the voltage-controlled oscillator 32 runsfreely, although it could also be disabled in the absence of an input IFsignal.

When an IF signal is initially input, the voltage-controlled oscillator32 is locked to the input IF signal by the action of the loop comprisingthe voltage-controlled oscillator 32, the variable gain amplifier 33,the mixer 35, the feedback path filter 36, the second limiter 29, thephase detector 30 and the low-pass filter 31. Since the power amplifier27 is not producing an output, the summer 34 can be disregarded. Duringthis period the frequency and phase of the voltage-controlled oscillator32 vary until lock is achieved. Once lock has been achieved and thefrequency and phase of the voltage-controlled oscillator 32 havestabilised, the output of the lock detector 40 changes state and thepower amplifier 27 is enabled. The gain of the power amplifier 27 isramped up to avoid sharp transitions in the output RF signal. While thegain of the power amplifier 27 is ramping up, the gain of the variablegain amplifier is ramped down by the amplifier control circuit 41 sothat the feedback signal becomes dominated by the output of the poweramplifier 27 and then completely dependent on the output of the poweramplifier 27.

The gain of the variable gain amplifier 33 is ramped down while the gainof the power amplifier 27 is ramping up to ensure that the amplitude offeedback signal is always sufficient to be limited by the second limiter29.

Referring to FIG. 5, a second embodiment is substantially the same asthe first embodiment, described above, except that a delay locked loopis added to the control the phase of the signal input to the variablegain amplifier 33. The delay locked loop is used so that during thetransition from control on the basis of the voltage-controlledoscillator output to control on the basis of the power amplifier output,the output from the variable gain amplifier 33 does not tend to cancelthe feedback from the power amplifier 27 due to a significant phasedifference between the signals.

The delay locked loop comprises a voltage-controlled delay 37 forcontrollably delaying the output of the voltage-controlled oscillator 32input into the variable gain amplifier 33, a phase detector 38 connectedto receive the input to the variable gain amplifier 33 and the output ofthe power amplifier 27 as its inputs and a low-pass filter 39 forfiltering the output of the phase detector 38 to provide a controlsignal for the voltage-controlled delay 37.

In another embodiment, the phase detector of the delay locked loopreceives the outputs of the variable gain amplifier and the poweramplifier as its inputs.

1. A phase-locked loop circuit comprising: an oscillator controlled independence on the output of a phase detector; an output amplifier foramplifying the output of the oscillator; a first feedback path to thephase detector from the output of the output amplifier; a secondfeedback path from the output of the oscillator to the phase detector,by-passing the output amplifier; and control means for disabling theoutput amplifier when the loop circuit is not locked and interruptingthe second feedback path when the loop circuit has become locked;wherein the second feedback path includes a variable gain amplifier andthe control means is configured to interrupt the second feedback path byreducing the gain of the variable gain amplifier.
 2. A circuit accordingto claim 1, wherein the control means is configured to interrupt thesecond feedback path by ramping down the gain of the variable gainamplifier.
 3. A circuit according to claim 2, wherein the control meansis configured to ramp up the gain of output amplifier on enablingthereof, the ramping down of the gain of the variable gain amplifieroverlapping the ramping up of the gain of output amplifier.
 4. A circuitaccording to claim 3, including phase control means for matching thephase of the output of the variable gain amplifier to that of the outputof the output amplifier when both are operating.
 5. A circuit accordingto claim 4, wherein the phase control means comprises a variable delayin the second feedback path, a phase detector receiving a signal fromthe second feedback path downstream of the variable delay and a signalfrom the first feedback path and a low-pass filter for filtering theoutput of the phase detector to provide a delay control input signal forthe variable delay.
 6. A circuit according to claim 1, wherein the firstand second feedback paths share a common portion.
 7. A circuit accordingto claim 6, wherein the first and second feedback paths are united by asummer.
 8. A circuit according to claim 6, wherein said common portionincludes a frequency down converter.
 9. A circuit according to claim 1,wherein the first feedback path provides a feedback signal for a closedloop envelope restoration circuit of an envelope elimination andrestoration transmitter, the control means including an envelopecontroller for controlling the gain of the output amplifier.
 10. Acircuit according to claim 1, wherein the output amplifier is an RFpower amplifier of a mobile phone.